Procurement Summary
Country : USA
Summary : Sources Sought Notice for CHIPS High-Throughput High-Resolution x-ray Laminography/Tomography System for Advanced Packaged Semiconductor Devices and Substrates
Deadline : 18 Dec 2024
Other Information
Notice Type : Tender
TOT Ref.No.: 111147755
Document Ref. No. : NIST-SS25-CHIPS-0038
Competition : ICB
Financier : Self Financed
Purchaser Ownership : Public
Tender Value : Refer Document
Purchaser's Detail
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Description
The purpose of this sources sought notice is to conduct market research and identify potential sources of commercial products/services that satisfy the Government-s anticipated needs.
BACKGROUND
The National Institute of Standards and Technology (NIST) CHIPS Metrology program develops and advances cutting edge metrology capabilities for members of the US semiconductor manufacturing ecosystem. This NIST conducted research program works with device manufacturers, tool vendors, materials suppliers, and other organizations to address critical metrology gaps to spur innovation within seven grand challenge areas. For more information on CHIPS Metrology, please visit https://www.nist.gov/chips/research-development-programs/metrology-program
CHIPS Metrology researchers at NIST Gaithersburg require high-throughput high-resolution non-destructive three-dimensional (3D) x-ray imaging to support research within grand challenges for Advanced Metrology for Future Microelectronics Manufacturing, Enabling Metrology for Integrating Components in Advanced Packaging, and Standardizing New Materials, Processes, and Equipment for Microelectronics. NIST anticipates procuring an x-ray laminography/tomography system and is seeking information from manufacturers capable of meeting the following needs:
Sample Types and Sizes Samples will be predominantly semiconductor wafers, panels, chips, test coupons, as well as advanced packaged devices, integrated circuit substrates, printed circuit board, and assemblies of these elements. Materials to be measured will include semiconductors, metals, insulators, and polymers. Features of interest include hybrid bonded interfaces, through substrate vias, underfill and encapsulation epoxies, thermal interface materials, wafer reconstitution polymers, back end-of-line wiring, solder balls, glass substrate, fiber reinforced polymer substates, and the bonds and defects present in these features. Typical samples...
Active Contract Opportunity
Notice ID : NIST-SS25-CHIPS-0038
Related Notice
Department/Ind. Agency : COMMERCE, DEPARTMENT OF
Sub-tier : NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY
Office: DEPT OF COMMERCE NIST
General Information
Contract Opportunity Type: Sources Sought (Original)
Original Published Date: Dec 04, 2024 09:07 am EST
Original Response Date: Dec 18, 2024 11:00 am EST
Inactive Policy: 15 days after response date
Original Inactive Date: Jan 02, 2025
Initiative: None
Classification
Original Set Aside:
Product Service Code: 6640 - LABORATORY EQUIPMENT AND SUPPLIES
NAICS Code: 33441 - Semiconductor and Other Electronic Component Manufacturing
Place of Performance: Gaithersburg, MD 20899 USA
Documents
Tender Notice